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| Technical Reference Notes AEQ15AF48 Series (Dual Output Quarter Brick - Baseplate) AEQ15AF48 - 5V/3.3V Dual Output DC-DC Converter Module Industry Standard 1/4 Brick w/ Baseplate: 36V-75V Input; 60W Output Power The AEQ15 series is among Astec's dual output; high-density converter offering that comes in an industry standard 1/4 brick baseplate package. The AEQ15 series has been designed to deliver 60W of clean, well-regulated DC power for today's demanding loads at high efficiency levels (89% typical for 30W/30W power split between rails). The 5V rail is capable of delivering 12A max and the 3.3V rail is capable of delivering 15A max for a maximum output power of 60W. The module comes with industry standard feature sets such as output enable with positive or negative logic options; input UVLO, output trim, over current, over voltage and over temperature protection. Electrical Parameters Input Input Range Input Surge Efficiency 36-75 VDC 100V / 100ms 89% (typ. at balanced load) Control Enable TTL compatible (Positive and Negative Enable Options) Output Load Current 5V @ 12A max 3.3V @ 15A max 60W Total Output Power 4% VO (5V) 3% VO (3V3) 80mVPK-PK max (5V output) 60mVPK-PK max (3.3V output) 10% VO,NOM 2% VO deviation (Typ) 50% to 75% Load Change < 100sec settling time (Typ) 120% IO,MAX Special Features * * * * * * * * Industry Standard 1/4 Brick Footprint with Baseplate High Efficiency @ 89% (60W full load) Positive and Negative Logic Enable Options High Capacitive Load Start-up Fixed Switching Frequency for EMI predictability Output Trim Input Under-Voltage Lockout Basic insulation Regulation (Typ) Ripple and Noise Output Voltage Adjust Range Transient Response Over Current Protection Switching Frequency 360kHz Environmental Specifications * * * -40C to 100C Base plate Temperature -40C to 125C Storage Temperature MTBF > 1 million hours Safety UL 1950, 3rd Edition CSA C22.2 No 950-95 EN60950 through TUV-PS MODEL: AEQ15AF48 SERIES JUNE 16, 2003 - REVISION 01 SHEET 1 OF 15 Technical Reference Notes AEQ15AF48 Series (Dual Output Quarter Brick - Baseplate) AEQ15 Series THIS SPECIFICATION COVERS THE REQUIREMENTS FOR A NEW 1/4-BRICK SIZE 12A-15A/ DUAL CHANNEL HIGH EFFICIENCY DC/DC CONVERTER. MODEL NAME AEQ15AF48 AEQ15AF48-6 AEQ15AF48N AEQ15AF48N-6 CONSTRUCTION Baseplate; 5mm pin length Baseplate; 3.7mm pin length Baseplate; 5mm pin length Baseplate; 3.7mm pin length VOUT / IOUT 5V / 12A; 3.3V / 15A 5V / 12A; 3.3V / 15A 5V / 12A; 3.3V / 15A 5V / 12A; 3.3V / 15A OPTIONS: Negative Enable: Positive Enable: 5mm (default) pin length: 3.7mm pin length: SUFFIX "N" No suffix No Suffix "-6" MODEL: AEQ15AF48 SERIES JUNE 16, 2003 - REVISION 01 SHEET 2 OF 15 Technical Reference Notes AEQ15AF48 Series (Dual Output Quarter Brick - Baseplate) Electrical Specifications STANDARD TEST CONDITION on a single module unless otherwise specified. Ta +VIN Enable -VIN +VOUT 2 O/P Return Trim +Vout 1 25C (Ambient Air) 48Vdc Dependent on model series Input return Load 2 Secondary Return Open Load 1 PIN 1 PIN 2 PIN 3 PIN 4 PIN 5 PIN 6 PIN 7 ABSOLUTE MAXIMUM RATINGS Stresses in excess of the absolute maximum ratings can cause permanent damage to the converter. Functional operation of the converter is not implied at these or any other conditions in excess of those given in the operational section of the specs. Exposure to absolute maximum ratings for extended period can adversely affect device reliability. Parameter Input Voltage1 Continuous Transient (100ms) Isolation Voltage Input to Output Input to Case Output to Case Operating baseplate temperature Storage Temperature Operating Humidity Max Output Power Device All All All Symbol VIN VI N, trans Min 0 0 -40 -55 Typ Max 75 100 1500 500 500 +100 +125 85 60 Unit Vdc Vdc Vdc Vdc Vdc C C % W All All All All TA TSTG PO Note: 1. An input line fuse is recommended (Littelfuse type 312003, rated 3A, 250V or equivalent). MODEL: AEQ15AF48 SERIES JUNE 16, 2003 - REVISION 01 SHEET 3 OF 15 Technical Reference Notes AEQ15AF48 Series (Dual Output Quarter Brick - Baseplate) Electrical Specifications (continued) INPUT SPECIFICATION Parameter Operating Input Voltage Input Under-Voltage Lock-out T_ON Threshold T_OFF Threshold Maximum Input Current1 Conditions: VIN =VIN,min IO = IO,max; TA = 25 C No Load Input Power VIN = 48Vdc Input Reflected Ripple Current2 Conditions: PO = PO,max; TA = 25 C BW: 5Hz to 20MHz Note: Device All All Symbol VIN Min 36 30 Typ 48 34.5 32.5 Max 75 35 2.25 Unit VDC Vdc Vdc A All IIN,max All All II1/ II2 - - 3.5 260 W mAPK-PK 2. External input capacitance required. See Input Reflected Ripple Current test measurement setup on Fig 1. OUTPUT SPECIFICATIONS Parameter Output Voltage Set point VIN = VIN, min to VIN, max; IO =IO1 + IO2 = 6A + 9A; TA = 25C Output Current Output Regulation Line: VIN = VIN, Min to VIN, max IO1 = 6A; IO2 = 9A Load: (1. VIN = 48Vdc; IO2 = IO,min: IO1 = IO,min to IO,max. 2.VIN = 48Vdc; IO1 = 3.5A; IO2 = 1-13A) TA =25C @ 300LFM Ripple and Noise3 Peak-to-Peak: (5Hz to 20MHz) External Load Capacitance Output Current-limit Inception4 VOUT = 90% VO,SET Output Short Circuit Current5 Efficiency Conditions: IO=IO1+IO2=6A+9A; VIN = 48Vdc; TA = 25C Device All Symbol VO,SET1 VO,SET2 IO1 IO2 VO1 VO2 VO1 VO2 Min 4.93 3.25 1 1 4.80 3.20 4.80 3.20 Typ 5.00 3.30 Max 5.08 3.35 12 15 5.20 3.40 5.20 3.40 Unit Vdc All A A Vdc Vdc Vdc Vdc All All All All All All VO1 VO2 IO1 IO2 13 18 89 90 80 60 10,000 18 24 150 - mVPK-PK mVPK-PK F A A IO,max % MODEL: AEQ15AF48 SERIES JUNE 16, 2003 - REVISION 01 SHEET 4 OF 15 Technical Reference Notes AEQ15AF48 Series (Dual Output Quarter Brick - Baseplate) Electrical Specifications (continued) OUTPUT SPECIFICATIONS Parameter Switching Frequency Dynamic Response5 Load Change from: IO = 50% to 75% of IO, Max Peak Deviation Settling Time to VO, Nom Load Change from: IO = 50% to 25% of IO, Max Peak Deviation Settling Time to VO, Nom Turn on time5 Condition: IO=IO,max; VO within 1%; the other channel @ min load Output Overshoot5 Condition: IO=IO,max; the other channel @ min load Device All All Symbol IO/t Min 310 Typ 360 2 250 2 250 1 Max 400 1 6 500 6 500 5 Unit KHz A/10s %Vo s %Vo s ms All All - - - 5 %Vo FEATURE SPECIFICATION Parameter Output Enable ON/OFF Negative Enable ("N" suffix) Enable Pin voltage for Module ON Module OFF Positive Enable (No "N"suffix) Enable Pin voltage for Module ON Module OFF Enable Pin Current Logic Low Logic High (ILKG @ Enable = 5V) Output Over Voltage Clamp (Auto Recovery; Hiccup Mode) Over Temperature trip point (baseplate temperature) Output Voltage Trim Range6 Note: Device N suffix Symbol Min Typ Max Unit - 0 1.8 1.8 0 5.7 3.8 115 2.5 5.0 5.0 2.5 1.0 50.0 6.5 4.3 V V V No suffix All All All All VO1 VO2 mA A V V C %VO 90 110 3. VIN = 48Vdc; IO = IO,max; the other channel at min load. See Figure 2 for Ripple test measurement setup. 4. Hiccup Mode; the other channel at min load. 5. The other channel at min load. 6. See appropriate Trim Equation and configuration on Figures 3 and 4. MODEL: AEQ15AF48 SERIES JUNE 16, 2003 - REVISION 01 SHEET 5 OF 15 Technical Reference Notes AEQ15AF48 Series (Dual Output Quarter Brick - Baseplate) Electrical Specifications (continued) ISOLATION SPECIFICATION Parameter Isolation Capacitance Isolation Resistance Device All All Symbol Min 10 Typ 680 Max Unit pF M SAFETY APPROVAL The AEQ15AF48 series have been certified through: * UL 1950 * CSA22.2 No 950-95 * EN 60950 through TUV-PS * Basic Insulation MODEL: AEQ15AF48 SERIES JUNE 16, 2003 - REVISION 01 SHEET 6 OF 15 Technical Reference Notes AEQ15AF48 Series (Dual Output Quarter Brick - Baseplate) Electrical Specifications (continued) TO OSCILLOSCOPE Ltest 12 uH BATTERY Cs 220 uF ESR < 0.1 OHM @ 20 C, 100 kHz 33 uF ESR < 0.7 OHM @ 20 C, 100 kHz Vi(+) Vi(-) Note: Measure the input reflected ripple current with a simulated source inductance (Ltest) of 12uH. Capacitor Cs offsets possible battery/ source impedance. Measure current as shown above. Figure 1. Input Reflected Ripple Current Measurement Setup. COPPER STRIP Vo(+) 1 uF Vo(-) 10 uF SCOPE RESISTIVE LOAD Note: Use a 1F 50V X7R ceramic capacitor and a 10F 25V tantalum cap. Scope measurement should be made using a BNC probe socket positioned about 76mm (3 in.) away from the module's output terminals. The ext. capacitors should be placed between the BNC socket and the module's output terminals, with a minimum distance of 51mm (2in.) from the latter. Figure 2. Peak to Peak Output Noise Measurement Setup. MODEL: AEQ15AF48 SERIES JUNE 16, 2003 - REVISION 01 SHEET 7 OF 15 Technical Reference Notes AEQ15AF48 Series (Dual Output Quarter Brick - Baseplate) Basic Operation and Features INPUT UNDER VOLTAGE LOCKOUT To prevent any instability to the converter, which may affect the end system, the AEQ15 series have been designed to turn-on once VIN is in the voltage range of 34.5-36 VDC. Likewise, it has also been programmed to turn-off when VIN drops down to 30 - 32.5 VDC. OUTPUT VOLTAGE ADJUST/TRIM The converter comes with a TRIM pin (PIN 6), which is used to adjust both outputs simultaneously by as much as 90% to 110% of its set point. This is achieved by connecting an external resistor as described below. To INCREASE the output voltages, external Radj_up resistor should be connected between TRIM PIN (Pin6) and +Vo2 (Pin 4). Please refer to Equation (1) for the VO,adj and Radj_up relationship. Equation (1) where: %VO,adj = percent change in o/p voltage Figure 3. External Trim resistor setup to increase o/p. To DECREASE the output voltages, external Radj_down resistor should be connected between TRIM PIN (Pin 6) and O/P Return (Pin 5). Please refer to Equation (2) for the VO,adj and Radj_down relationship. Equation (2) Figure 4. External Trim resistor setup to decrease o/p. MODEL: AEQ15AF48 SERIES JUNE 16, 2003 - REVISION 01 SHEET 8 OF 15 Technical Reference Notes AEQ15AF48 Series (Dual Output Quarter Brick - Baseplate) Basic Operation and Features (continued) OUTPUT ENABLE The AEQ15 comes with an Enable pin (PIN 2) which is primarily used to turn ON/OFF the converter. Both a Positive (no part number suffix required) and Negative (suffix "N" required) Enable Logic option is being offered (see Part Numbering Scheme in Table 1). For Positive Enable, the converter is turned on when the Enable pin is at logic HIGH or left open. The unit turns off when the Enable pin is at logic LOW or directly connected to -VIN. On the other hand, the Negative Enable version turns on when the Enable pin is at logic LOW or directly connected to -VIN. The unit turns off when the Enable pin is at Logic HIGH. OUTPUT OVER VOLTAGE PROTECTION (OVP) The Over Voltage Protection circuit will shut down the entire converter if any of the two output voltages exceeds the OVP threshold limits. The converter will automatically recover once the fault is removed. OUTPUT OVER CURRENT PROTECTION (OCP) The Over Current Protection circuit will shutdown the converter if any of the load current of either output reaches the OCP threshold limits. The unit will automatically recover by going into a hiccup mode until the cause of the over current condition is removed. Note that in Figures 5 and 6, Channel 1 is 3.3V and Channel 2 is 5V. Figure 5. IO2 (5V) = OCP, IO1 (3V3) = 1A. Figure 6. IO2 (5V) = 1A, IO1 (3V3) = OCP. MODEL: AEQ15AF48 SERIES JUNE 16, 2003 - REVISION 01 SHEET 9 OF 15 Technical Reference Notes AEQ15AF48 Series (Dual Output Quarter Brick - Baseplate) Basic Operation and Features (continued) OVER TEMPERATURE PROTECTION (OTP) The Over Temperature Protection circuit will shutdown the converter once the sensed location reaches the OTP range. This feature prevents the unit from overheating and consequently going into thermal runaway, which may further damage the converter and the end system. Such overheating may be an effect of operation outside the given power thermal derating conditions. Restart is possible once the baseplate temperature drops to less than 105C. MODEL: AEQ15AF48 SERIES JUNE 16, 2003 - REVISION 01 SHEET 10 OF 15 Technical Reference Notes AEQ15AF48 Series (Dual Output Quarter Brick - Baseplate) Performance Curves EFFICIENCY Efficiency vs. 5V Load Current 95% 90% 85% Efficiency [%] 80% 75% 70% 65% 60% 55% 10% 36Vin 48Vin 75Vin 25% 40% 55% 70% 85% 100% 60% 55% 10% Efficiency [%] 95% 90% 85% 80% 75% 70% 65% 36Vin 48Vin 75Vin 25% 40% 55% 70% 85% 100% Efficiency vs. 3.3V Load Current 5V Load [%IO1,MAX] 3.3V Load [%IO2,MAX] Figure 7. Efficiency Curve vs. 5V Load Current (3.3V load fixed at 1A; TBASEPLATE = 45C. Figure 8. Efficiency Curve vs. 3.3V Load Current (5V load fixed at 1A; TBASEPLATE = 45C. STARTUP CHARACTERISTIC Figure 9. Output startup characteristic at 48VIN (CH1), 3.3V at 1A load (CH2), 5V at 1A load (CH3). Figure 10. Output startup characteristic when enable pin is activated (CH1), 3.3V at 1A load (CH2), 5V at 1A load (CH3). MODEL: AEQ15AF48 SERIES JUNE 16, 2003 - REVISION 01 SHEET 11 OF 15 Technical Reference Notes AEQ15AF48 Series (Dual Output Quarter Brick - Baseplate) Performance Curves (continued) CURRENT VS. TEMPERATURE CURVES O/P Current vs. Temperature (3V3@1A fixed) 14 12 3.3V Load Current, A 5V Load Current, A 10 8 6 4 2 0 25 40 55 70 Baseplate Temp. C 85 100 0 LFM 1 LFM 00 200 LFM 300 LFM 400 LFM O/P Current vs. Temperature (5V@1A fixed) 16 14 12 10 8 6 4 2 0 25 40 55 70 Baseplate Temp. C 85 100 0 LFM 1 LFM 00 200 LFM 300 LFM 400 LFM Figure 11. 5V output current vs. Baseplate temperature curves when 3.3V load = 1A (min load), VIN = 48V. Figure 12. 3.3V output current vs. Baseplate temperature curves when 5V load = 1A (min load), VIN = 48V. O/P Current vs. Temperature (5V@6A fixed) 10 8 6 4 2 0 25 40 55 70 Baseplate Temp. C 85 100 3.3V Load Current, A 0 LFM 1 LFM 00 200 LFM 300 LFM 400 LFM Figure 13. 3.3V output current vs. Baseplate temperature curves when 5V load = 6A, VIN = 48V. MODEL: AEQ15AF48 SERIES JUNE 16, 2003 - REVISION 01 SHEET 12 OF 15 Technical Reference Notes AEQ15AF48 Series (Dual Output Quarter Brick - Baseplate) Performance Curves (continued) OUTPUT RIPPLE Figure 14. Output ripple at VIN = 48V, 5V (CH2) at 1A load, 3.3V (CH1) at 1A load. Figure 15. Output Ripple at VIN = 48V, 5V (CH2) at 1A load, 3.3V (CH1) at 15A load. Figure 16. Output Ripple at VIN = 48V, 5V (CH2) at 12A load, 3.3V (CH1) at 1A load. Figure 17. Output Ripple at VIN = 48V, 5V (CH2) at 6A load, 3.3V (CH1) at 9A load. MODEL: AEQ15AF48 SERIES JUNE 16, 2003 - REVISION 01 SHEET 13 OF 15 Technical Reference Notes AEQ15AF48 Series (Dual Output Quarter Brick - Baseplate) Mechanical Specifications Parameter Dimension Device All Symbol L W H Weight PIN ASSIGNMENT 1 2 3 4 Min - Typ 2.30 [58.42] 1.50 [38.10] 0.50 [12.70] 5 6 7 Max 60 [2.1] Unit in [ mm ] in [ mm ] in [ mm ] g [oz] +VIN Enable -VIN +VOUT2 O/P RTN TRIM +VOUT1 NOTE: Pin diameters are 0.04" (1.02mm) in all positions Figure 18. AEQ15 Series Mechanical Outline Drawing MODEL: AEQ15AF48 SERIES JUNE 16, 2003 - REVISION 01 SHEET 14 OF 15 Technical Reference Notes AEQ15AF48 Series (Dual Output Quarter Brick - Baseplate) Mechanical Specifications (continued) SOLDERING CONSIDERATIONS The AEQ15AF48 series converters are compatible with standard wave soldering techniques. When wave soldering, the converter pins should be preheated for 20-30 seconds at 110C and wave soldered at 260C for less than 10 seconds. When hand soldering, the iron temperature should be maintained at 425C and applied to the converter pins for less than 5 seconds. Longer exposure can cause internal damage to the converter. Cleaning can be performed with cleaning solvent IPA or with water. OUTPUT VOLTAGE 1 OUTPUT VOLTAGE 2 ENABLE LOGIC PIN LENGTH OPTION AEQ15 w A = 5.0V x F = 3.3V 48 y z N = Negative "Blank" = 5mm (Standard) "Blank" = Positive "-6" = 3.7mm Table 2 PART NUMBERING SCHEME FOR ORDERING Please call 1-888-41-ASTEC for further inquiries or visit us at www.astecpower.com MODEL: AEQ15AF48 SERIES JUNE 16, 2003 - REVISION 01 SHEET 15 OF 15 |
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